OrCAD Sigrity ERC
OrCAD® Sigrity™ Electrical Rules Check (ERC) enables PCB designers to screen a PCB design for signal quality without having to assign any simulation models or to be a signal integrity expert. Going beyond simple geometry-based DRC, the entire PCB design can be evaluated for impedance discontinuities, excessive crosstalk, and return path discontinuities. Using OrCAD Sigrity ERC during PCB layout can reduce overall design time by not over-burdening the SI experts with signal quality issues that can be found and addressed by the PCB layout stage.
OrCAD Sigrity ERC produces the impedance and coupling overlay, where layout traces are color-coded with impedance and coupling coefficient values. The overlays clearly show increased impedance and coupling due to voids on reference planes, which
would be practically impossible to identify on the board level with visual inspection.
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Click on Data Sheet to download
Click on image for enlarged view
