Noesis is among world-leaders in Forward Error Correction technology having developed a rich portfolio of FEC IP cores that includes Reed Solomon Codecs, Viterbi Decoders, Turbo Product Codecs, Turbo Convolutional Codecs, BCH codecs, LDPC Codecs, Interleavers, AWGN Channel Emulators. The offered IP solutions are fully configurable and can be used in any telecom technology that requires FEC. The company offers a broad range of architectures optimized for speed, area and power dissipation as well as customized versions tailored to specific customer needs. In addition to the complete suite of FEC IP cores, the company offers a range of silicon proven cores in the areas of encryption (AES, RC4, SHA), networking (E1/E2/E3, T1/T2/T3, HDLC), audio/voice compression (G729, G726, G711, CVSD), telecom DSP (Channel estimators, Channel equalizers, Synchronization Units, FFT processors, Demodulators) as well as turn-key solutions such as baseband PHYs (WiMAX, LTE, and low-power processors for WSN applications.

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