OrCAD EE Designer

In today’s engineering design environment, electrical engineers are asked to perform a variety of challenges in a fraction of the time. Along with schematic entry, circuit simulation is becoming an integral part of the schematic design process. Recognizing this need, Cadence® has created the Cadence OrCAD® EE Designer suite a highly integrated front-end design solution with Cadence OrCAD Capture and Cadence PSpice® A/D in a single package.

OrCAD EE Designer includes:

• OrCAD Capture a comprehensive solution for entering, modifying, and verifying complex system designs quickly and cost-effectively
• PSpice A/D a full featured analog simulator with support for digital elements to help solve virtually any design challenge

BENEFITS

• Provides fast, intuitive schematic editing
• Boosts schematic editing efficiency through design reuse
• Automates the integration of field programmable gate arrays (FPGAs) and programmable logic devices (PLDs)
• Makes changes quickly through a single spreadsheet editor
• Imports and exports every commonly used design file format
• Faster simulation times, higher reliability, and better convergence on larger designs
• Explores design relationships with “what if” scenarios before committing to hardware
• Explores circuit behavior using basic DC, AC, noise, and transient analyses
• Offers library selection of more than 20,000 analog and mixed-signal models

FEATURES
Design Capture Technology
OrCAD Capture offers a comprehensive solution for entering, modifying, and verifying complex system designs quickly and cost-effectively. Whether used to design a new analog circuit, revise a schematic diagram for an existing PCB, or design a digital block diagram with an HDL module, OrCAD Capture allows designers to enter, modify, and verify the PCB design.

SCHEMATIC EDITING
The full-featured schematic editor enables users to place and connect parts from a comprehensive set of functional libraries.

PROJECT MANAGEMENT
The project manager enables users to collect and organize all the resources needed for the project throughout the design flow.

HIERARCHICAL DESIGN AND REUSE
OrCAD Capture boosts schematic editing efficiency by enabling subcircuit reuse without having to make multiple copies.

LIBRARIES AND PART EDITING
The library editor is accessed directly from the user interface. Users can create and edit parts in the library or directly from the schematic page without interrupting workflow.

EASY DATA ENTRY
Designers can access all part, net, pin, and title block properties or any subset and make changes quickly through the spreadsheet property editor.
New Features and Enhancements in Capture 16.6 Release
Graphical Operation (GOp) Locking
The GOp locking feature in Capture now allows you to lock the different parts of a schematic design. Lock objects on a page, lock a page, folder, or even the complete design. This feature prevents inadvertently moving or deleting parts of a design that are locked. Designs requiring alteration will need to be unlocked before any changes are made.

Placement Report
Generate a report of the X and Y locations of the placements of the parts on a schematic. This report, generated as a .CSV file, provides these details of the parts:

• Reference designator
• Part name
• Schematic name
• Sheet number
• File system location of the part library
• X and Y co-ordinate location

Find Result Reports
After executing the Find command on a design, generate a report for the results from the command. By running the Find command to search for different types of objects in a design, the search results display in different tabs of the Find window, allowing you to export the data from each tab.

Introduction of NetGroup
OrCAD Capture introduces the concept of the NetGroup that allows you to create groups of nets. A NetGroup can include a group of scalar nets, vector nets, or a combination of both. Capture allows you to create Named NetGroups that can be used across a design or exported to other designs. Alternatively, for one-time use, you can create an Unnamed/Adhoc NetGroup.

The new NetGroup Connector can be used to intelligently merge and tap out signals. It can also be used to generate net names for connected signals

Advanced Simulation Technology
PSpice A/D is a full-featured analog simulator with support for digital elements to help solve virtually any design challenge from high-frequency systems to low-power IC designs. The powerful simulation engine integrates easily with Cadence PCB schematic entry solutions, improving time to market and keeping operating costs in check.

DESIGN ENTRY AND EDITING
PSpice A/D integrates seamlessly with the Cadence front-to-back PCB design flow, making it possible to have a single, unified design environment for both simulation and PCB design. Select from a library of more than 20,000 symbols and models for simulation to design with Cadence PCB schematic design entry technology.

STIMULUS CREATION
Access built-in functions that can be described parametrically or draw piece-wise linear (PWL) signals freehand with the mouse to create any shape stimulus.

CIRCUIT SIMULATION
Users can easily set up and run simulations, and then cross-probe simulation results from Probe, an industry- standard waveform viewer.

MIXED ANALOG/DIGITAL SIMULATION
Integrated analog and event-driven digital simulations improve speed without loss of accuracy. A single graphical waveform analyzer displays mixed analog and digital simulation results on the same time axis.

GRAPHICAL RESULTS AND DATA DISPLAY
Probe Windows allows users to choose from an expanded set of mathematical functions to apply to simulation output variables.

MODELS
Included are a large variety of accurate internal models which typically include temperature effects that add flexibility to simulations.

MODEL LIBRARY
Users can select from more than 20,000 analog and mixed-signal models of devices made in North America, Japan, and Europe.

BEHAVIORAL MODELING
Functional blocks are described using mathematical expressions and functions, which allows designers to leverage a full set of mathematical operators, nonlinear functions, and filters.

MAGNETIC PARTS EDITOR
The Magnetic Parts Editor helps designers overcome issues involved in manually designing transformers. Users can design magnetic transformers and DC inductors, and generate simulation models for transformers and inductors.

CHECKPOINT RESTART
This feature allows designers to store simulation states at various time-points and then restart simulations from any of the simulation states, which saves time.

New PSpice Models in Release 16.6
The 16.6 library has a range of new models that can be used in diverse applications.

Model Categories

Partial Design Simulation
The 16.6 release comes with the productivity enhancing feature of partial design simulation. Identify individual components of any design, and, using the partial design simulation feature, simulate only selected portions. Using this feature, you can simulate different circuits in the design with different simulation profiles. In addition, you can compare and merge portions of a design quickly.

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     OrCAD EE Designer Data Sheet

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