Allegro Sigrity SI Base

Advanced signal quality analysis

Allegro Sigrity SI reads and writes directly to the Allegro PCB and IC package design database for fast and accurate integration of results. It provides a SPICE-based simulator and embedded field solvers for extraction of 2D and 3D structures. It supports transistor-level and behavioral I/O modeling, including power-aware simulation using IBIS models. Parallel bus and serial channel architecture can be explored pre-layout to compare alternatives, or post-layout for a comprehensive analysis of all associated signals.

Key Benefits:

  • Performs a wide variety of SI analyses
  • Early detection of design errors to increase first-pass success
  • Sets accurate constraints quickly and early in the process
  • Improves product performance through solution-space exploration
  • Explores alternative topologies in the earliest stages
  • Generates S-parameters from signal topologies or analyzes signals in S-parameter format
  • Generates estimated crosstalk tables to help reduce PCB crosstalk
  • Verifies multiple-board and silicon-package-board signal paths


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   Allegro Sigrity SI Base Data Sheet

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